Interconnect underdogs steering chiplet design bandwagon
By Majeed Ahmad , EDN (September 6, 2024)
The chiplets movement is gaining steam, and it’s apparent from how this multi-die silicon premise is dominating the program of the AI Hardware and Edge AI Summit to be held in San Jose, California from 10 to 12 September 2024. The annual summit focuses on deep tech and machine learning ecosystems to explore advancements in artificial intelligence (AI) infrastructure and edge deployments.
At the event, Alphawave Semi’s CTO Tony Chan Carusone will deliver a speech on chiplets and connectivity while showing how AI has emerged as the primary catalyst for the rise of chiplet ecosystems. “The push for custom AI hardware is rapidly evolving, and I will examine how chiplets deliver the flexibility required to create energy-efficient systems-in-package designs that balance cost, power, and performance without starting from scratch,” he said while talking about his presentation at the event.
To read the full article, click here
Related Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Interconnect Chiplet
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related News
- Baya Systems and Blue Cheetah Partner to Deliver Chiplet Interconnect Solutions
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
- Keysight Expands Chiplet Interconnect Standards Support in Chiplet PHY Designer 2025
- Tenstorrent Selects Blue Cheetah Chiplet Interconnect IP For Its AI and RISC-V Solutions
Latest News
- Untether AI Enters Into a Strategic Agreement with AMD
- Alphawave Semi Tapes Out Breakthrough 36G UCIe™ IP on TSMC 2nm, Unlocking Foundational AI Platform IP on Nanosheet Processes
- How Secure Are Analog Circuits?
- Sarcina Technology advances photonic package design to address key data center challenges
- Imec demonstrates 16nm pitch Ru lines with record-low resistance obtained using a semi-damascene integration approach