Chiplets: Where Are We Today?
The use of chiplet-based designs is expected to expand beyond high-performance parts to the broader market.
By Barry Pangrle, Semi Enginnering (February 5th, 2025)
The 3rd annual Chiplet Summit was held in Santa Clara from January 21st to 23rd at the Convention Center. The conference continues to grow from its 1st year when it was held at the San Jose Doubletree Hotel (almost exactly 2 years ago). During his Chairman’s Welcome presentation, Chuck Sobey mentioned that there were 41 exhibitors at this year’s conference.
Chuck was also the moderator for the opening plenary session Chiplets: Where We Are Today. The speakers were Jim Handy of Objective Analysis and Jawad Nasrullah from Palo Alto Electron.
Jim Handy’s presentation was titled “The Chiplet Market Today and Where We’re Headed.” While people are familiar with Gordon Moore’s Law about the scaling of semiconductor integrated circuits made in his paper, “Cramming Components onto Integrated Circuits,” a lesser-known statement made in that very same paper claims, “It may prove to be more economical to build large systems out of smaller functions, which are separately packaged and interconnected.” So, the creator of Moore’s Law saw the possibility of a future with chiplet-based designs 60 years ago.
To read the full article, click here
Related Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Interconnect Chiplet
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related News
- Are Chiplets Enough to Save Moore's Law?
- Podcast: Chiplets are quite in vogue these days. But are they the solution to all your problems?
- Why Chiplets Are So Critical In Automotive
- What are the challenges when testing chiplets?
Latest News
- Untether AI Enters Into a Strategic Agreement with AMD
- Alphawave Semi Tapes Out Breakthrough 36G UCIe™ IP on TSMC 2nm, Unlocking Foundational AI Platform IP on Nanosheet Processes
- How Secure Are Analog Circuits?
- Sarcina Technology advances photonic package design to address key data center challenges
- Imec demonstrates 16nm pitch Ru lines with record-low resistance obtained using a semi-damascene integration approach