Benefits And Challenges In Multi-Die Assemblies
What makes advanced packaging so attractive to some companies and not others.
By Ed Sperling And Laura Peters, SemiEngineering | April 2nd, 2025
Semiconductor Engineering sat down to discuss chiplets, hybrid bonding, and new materials with Michael Kelly, vice president of Chiplets and FCBGA Integration at Amkor; William Chen, fellow at ASE; Dick Otte, CEO of Promex Industries; and Sander Roosendaal, R&D director at Synopsys Photonics Solutions. What follows are excerpts of that discussion.
To read the full article, click here
Related Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Interconnect Chiplet
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related News
- Chiplet Pioneer Eliyan Achieves First Silicon in Record Time with Implementation in TSMC 5nm Process, Confirms Most Efficient Chiplet Interconnect Solution in the Multi-Die Era
- What’s next for multi-die systems in 2024?
- TSMC to Provide 3DIC Integration for AI Chips in 2027, Featuring 12 HBM4 and Chiplets Manufactured with A16
- Alphawave Semi ‘Redefines Connectivity’ in AI Hardware and Edge AI Summit 2024 Presentation on Chiplet Interconnects
Latest News
- Untether AI Enters Into a Strategic Agreement with AMD
- Alphawave Semi Tapes Out Breakthrough 36G UCIe™ IP on TSMC 2nm, Unlocking Foundational AI Platform IP on Nanosheet Processes
- How Secure Are Analog Circuits?
- Sarcina Technology advances photonic package design to address key data center challenges
- Imec demonstrates 16nm pitch Ru lines with record-low resistance obtained using a semi-damascene integration approach