Ayar CEO: ‘Copper Is Already Broken; Agentic AI Will Require Optical I/O’
By Sally Ward-Foxton, EETimes (October 7, 2024)
SAN JOSE, California—At the AI Hardware Summit, Ayar Labs CEO Mark Wade presented the results of a sophisticated simulation of large-scale inference systems built by the company to assess what will be required to make next-generation versions of generative AI models economical.
The results show that optical die-to-die interconnects, like Ayar’s technology, will be required to scale LLM inference for next-gen models in a way that makes economic sense. The simulator also provides a useful way to assess the current state of so-called “tokenomics” (the economics of providing and building products on LLM inference APIs).
To read the full article, click here
Related Chiplet
- High-Density Electronic-Photonic Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Interconnect Chiplet
- Bridglets
- Automotive AI Accelerator
Related News
- Ayar Labs CEO: Optical Chiplets Coming to SOCs Soon
- Ayar Labs Names Mark Wade CEO
- Ayar Labs to Showcase Optical Interconnect Solutions to Redefine AI Infrastructure at OFC 2024
- Intel Demonstrates First Fully Integrated Optical I/O Chiplet
Latest News
- Untether AI Enters Into a Strategic Agreement with AMD
- Alphawave Semi Tapes Out Breakthrough 36G UCIe™ IP on TSMC 2nm, Unlocking Foundational AI Platform IP on Nanosheet Processes
- How Secure Are Analog Circuits?
- Sarcina Technology advances photonic package design to address key data center challenges
- Imec demonstrates 16nm pitch Ru lines with record-low resistance obtained using a semi-damascene integration approach