Optimizing Photodetector Model to a Silicon Photonics Foundry Process

This application note explores the optimization of a PIN photodetector model within the Keysight Photonic Designer, a leading-edge photonic design automation (PDA) solution. The focus is on customizing the model to align with specific silicon photonics foundry processes, thereby achieving unprecedented accuracy in PIC simulations.

Keysight Photonic Designer supports the creation of both purely optical circuits and hybrid electro-optical systems, incorporating physics-based models to ensure seamless and precise design steps from concept to validation. The tool includes a template silicon photonics process design kit (PDK) that allows users to modify design variables to reflect a target foundry’s manufacturing parameters. This flexibility is crucial for developing PICs that meet stringent performance standards.

The application note delves into the intricacies of the PIN photodetector model, which includes both semiconductor properties and parasitic elements such as vias, metal pads, and other resistive or capacitive components. These elements are essential for producing simulation results that closely align with empirical data, ensuring high bandwidth and signal fidelity.

The process begins with setting up the PIN photodetector simulation, conducting an AC small-signal simulation to determine the 3-dB bandwidth. This involves configuring the photodetector with parasitic components, bias voltage, load resistance, and an optical input source, covering frequencies from 10 MHz to 67 GHz. The simulation results are then validated against measurement data from a previously fabricated chip, highlighting discrepancies that can be addressed through parameter tuning.

Model tuning to a specific foundry process involves adjusting design variables to reflect foundry-specific variations in doping levels, material properties, and layer thicknesses. The optimization process uses ADS tools to systematically adjust variables until the model aligns with empirical data. This includes optimizing parasitic-related variables, series resistance, junction capacitance, and drift and diffusion mechanisms.

To ensure the robustness of the optimized values, multi-scenario verification is conducted under different operating conditions, such as varying bias voltages. This step confirms that the optimized design variables accurately represent the photodetector's behavior across multiple scenarios, enhancing the model’s reliability for real-world applications.

In conclusion, this application note outlines a comprehensive approach to optimizing a PIN photodetector model within the Keysight Photonic Designer template silicon photonics PDK. By leveraging advanced simulation and optimization capabilities, engineers can achieve high accuracy in model outputs, aligning them with empirical data to reflect the true performance of fabricated devices. This process enables designers to confidently customize PICs for varied foundry processes, ensuring reliable and accurate simulation results that guide fabrication decisions.